--test linowej transformacji
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;


entity test_lt is
    Port ( din : in  STD_LOGIC_VECTOR (7 downto 0);
		dout : out  STD_LOGIC_VECTOR (7 downto 0));
end test_lt;


architecture Behavioral of test_lt is

component lineartransf is
    Port ( li : in  STD_LOGIC_VECTOR (127 downto 0);
		lo : out  STD_LOGIC_VECTOR (127 downto 0));
end component lineartransf;

component invlineartransf is
    Port ( li : in  STD_LOGIC_VECTOR (127 downto 0);
		lo : out  STD_LOGIC_VECTOR (127 downto 0));
end component invlineartransf;

signal ldin, lil, ilo : STD_LOGIC_VECTOR (127 downto 0);
begin
ldin(7 downto 0) <=  din(7 downto 0);
ldin(127 downto 8) <= X"AFB3299C0A397BADD4A3C736294B45";

lin: lineartransf port map (ldin, lil);
ilin: invlineartransf port map (lil, ilo);

dout(7 downto 0)<=ilo(7 downto 0);
end Behavioral;
